A temporal bipartitioning algorithm for dynamically reconfigurable FPGAs

نویسندگان

  • E. Cantó
  • Juan Manuel Moreno
  • Joan Cabestany
  • I. Lacadena
  • Josep Maria Insenser
چکیده

Example 1, StReAm, applies the object-oriented design methodology to high-level programming of data streaming applications. While conventional CAD/compiler systems for FPGAs make it very difficult to explore arithmetic optimizations, StReAm offers the flexibility to adapt the number representation, precision, and arithmetic algorithm to the particular needs of the application. Example 2, BSAT, enables us to quickly explore architectures and algorithms for solving Boolean satisfiability problems on FPGAs. By combining industry-strength state machine optimization with object-oriented module generation and placement, BSAT offers fast design time, high flexibility, and high performance of the final designs. Current limitations of our design environment are: In case the generated design does not fit on one FPGA, spatial and/or temporal partitioning must be done manually. Although our framework facilitates automatic spatial partitioning onto multiple FPGAs on the C++ level, temporal partitioning is left for future work. ACKNOWLEDGMENT The author would like to thank H. Hübert for helping with the implementation of StReAm and L. Séméria for discussions on the draft of this paper. Highly concurrent computing structures for matrix arithmetic and signal processing, " IEEE A system for stream-based reconfigurable computing, " in Proc. Hardware software tri-design of encryption for mobile communication units, " in Proc. [21] J. Silva and K. Sakallah, " GRASP—A new search algorithm for satisfia-bility, " in Proc. Abstract—This paper will describe a systematic method to map synchronous digital systems into dynamically reconfigurable programmable logic (i.e., programmable logic able to swap in real time the configuration defining the functionality of the system). The method is based on a temporal bipartitioning technique that is able to separate the static implementation of a circuit in two temporal independence hardware contexts. As the experimental results show, the method is capable of improving the functional density of the dynamic implementation with respect to the static one.

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عنوان ژورنال:
  • IEEE Trans. VLSI Syst.

دوره 9  شماره 

صفحات  -

تاریخ انتشار 2001